1. Technical Field
The present invention relates to a package on package substrate.
2. Description of the Related Art
With the development of electronic industries, there are rapidly increasing demands for compact, multi-functional electronic parts. While a single electronic element has been mounted on the conventionally printed circuit board, the new stack package substrate has a plurality of electronic elements mounted on one substrate.
The system in package (SiP) has been created in the evolution of designing a package substrate to satisfy the demands for the compact, multi-functional electronic parts. The SiP is being further developed to various types, such as the package in package (PiP) and the package on package (PoP).
With an increasing number of studies and growing demands for high-performance, high-integration package substrate, the PoP, which stacks a package substrate on a package substrate, has become accepted as an alternative choice.
An important design factor of implementing a PoP is the overall thickness of a package. Although there has been an attempt to stack and mount two or more integrated circuits on a bottom package to improve the performance of the PoP, the increased overall thickness of the package hindered the implementation of the PoP.
The conventional PoP has been structured by stacking 1 to 4 integrated circuits on a top package to form a package and mounting one integrated circuit on a bottom package by wire-bonding and then stacking the top package on the bottom package.
However, with the increasing density in the package, there have been demands for a multi-stack structure, in which 4 or more integrated circuits are stacked on a top package and 2 or more integrated circuits are stacked on a bottom package. This causes an increase in the overall thickness of the PoP and especially requires an increase in the distance between the top package and the bottom package.
Moreover, as the number of mounted integrated circuits is increased, the number of I/O connection terminals is also increased. Accordingly, there have been growing demands for a fine pitch bump.
In order to increase the distance between the top package and the bottom package, it is required to increase the size of a solder ball adhered to a lower side of the top package. However, this contradicts the demand for the aforementioned fine pitch.
Consequently, the conventional PoP technology has not been able to achieve a sufficient distance between packages to stack two or more integrated circuits on the bottom package corresponding to the thickness of the integrated circuits and simultaneously form a fine pitch.